The physical connectivity of the registers is seen in this map in the "S1C88 Core Reference Manual"

These are the registers: Name #bits Description A 8 data register B 8 data register AB 16 combination of A and B H 8 index (data) register L 8 index (data) register HL 16 combination of H and L IX 16 index register IY 16 index register PC 16 program counter SP 16 stack pointer BR 8 base register SC 8 system condition register CC 4 custom condition flag NB 8 new code bank register CB 8 code bank register EP 8 expand page register XP 8 expand page register for IX YP 8 expand page register for IY

 

System Condition Flags (SC) Mnemonic Bit Description Z 0 zero flag C 1 carry flag V 2 overflow flag N 3 negative flag D 4 decimal flag U 5 unpack flag I0 6 interupt 0 flag I1 7 interupt 1 flag

The 45 Instructions Function Mnemonic Operation Intel® 8088 Equivalent Notes Arithmetic and Logic ADC addition with carry     ADD addition     AND logical product (bitwise AND)     BIT bit test TEST Use a mask to test a bit or bits in A, B, [HL] without affecting registers except for the flags. CP comparision CMP Basically subtraction of second argument from first argument except that only the flags are changed (not other register contents as with SUB).  So, if arguments are equal, the Z flag is set. CPL 1's compliment (negation)     DEC decrement     DIV division   L=HL/A, H=remainder    Only 8-bit :( INC increment     MLT multiplication MUL HL=A*L,  No arguments because always A*L! NEG 2's compliment (negation)     OR logical sum (bitwise OR)     SUB subtraction     UPCK unpack     XOR exclusive OR     Transfer EX byte/word exchange XCHG   LD load MOV   SWAP nibble exchange     Rotate/Shift Only 1 shift per instruction! RL rotate left through carry RCL   RLC rotate left ROL   RR rotate right through carry RCR Carry goes to LSB, MSB goes into carry RRC rotate right ROR   SLA shift arithmetic left SAL MSB goes to carry, 0 goes to LSB SLL shift logical left SHL   SRA shift arithmetic right SAR   SRL shift logical right SHR   Auxilary Operation PACK pack     SEP code extension     UPCK unpack     Stack Control POP pop stack     PUSH push stack     Branch CALL indirect call     CARL relative long call   See note below CARS relative short call   See note below DJR loop     INT software interrupt     JP indirect jump     JRL relative long jump   See not below JRS relative short jump   See not below RET return     RETE exception processing return     RETS return and skip     System Control HALT shift to HALT status     NOP no operation     SLP shift to SLEEP status

     

Note:  We seem to be using CAR for CARL and CARS and JR for JRS and JRL.  I think the assembler decides which to use automatically.